digital design through verilog Mcgraw-hill ebook free download

E-Book Details:

Title:	Fundamentals Of Digital Logic With VHDL  Design , 3rd Edition
Publisher:	Mcgraw-hill Science/engineering/math
Author:	Stephen Brown, Zvonko G. Vranesic
Edition:	Hardcover,3rd Edition (Apr 2008)
Format:	PDF
ISBN:	0077221435
EAN:	9780077221430,978-0077221430
No. of Pages:	939

Book Description:

Fundamentals of Digital Logic with VHDL Design teaches the basic design techniques for logic circuits. The text provides a clear and easily understandable discussion of logic circuit design without the use of unnecessary formalism. It emphasizes the synthesis of circuits and explains how circuits are implemented in real chips. Fundamental concepts are illustrated by using small examples, which are easy to understand. Then, a modular approach is used to show how larger circuits are designed.

VHDL is a complex language so it is introduced gradually in the book. Each VHDL feature is presented as it becomes pertinent for the circuits being discussed. While it includes a discussion of VHDL, the book provides thorough coverage of the fundamental concepts of logic circuit design, independent of the use of VHDL and CAD tools. A CD-ROM containg all of the VHDL design examples used in the book, as well Altera's Quartus II CAD software, is included free with every text.

"Fundamentals of Digital Logic with VHDL Design" teaches the basic design techniques for logic circuits. It emphasizes the synthesis of circuits and explains how circuits are implemented in real chips. Fundamental concepts are illustrated by using small examples, which are easy to understand. Then, a modular approach is used to show how larger circuits are designed.

VHDL is used to demonstrate how the basic building blocks and larger systems are defined in a hardware description language, producing designs that can be implemented with modern CAD tools. The book emphasizes CAD through the use of Altera's Quartus II CAD software, a state-of-the-art digital circuit design package. This software produces automatic mapping of designs written in VHDL into Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Devices (CPLDs).

This book is intended for an introductory course in digital logic design, which is a basic course in most electrical and computer engineering programs. A successful designer of digital logic circuits needs a good understanding of basic concepts and a firm grasp of computer-aided design (CAD) tools. The purpose of our book is to provide the desirable balance between teaching the basic concepts and practical application through CAD tools. To facilitate the learning process, the necessary CAD software is included as an integral part of the book package.

ABOUT THE AUTHOR:

Stephen Brown received the Ph.D. and M.A.Sc. degrees in Electrical Engineering from the University of Toronto, and his B.A.Sc. degree in Electrical Engineering from the University of New Brunswick. He joined the University of Toronto faculty in 1992, where he is now a Professor in the Department of Electrical & Computer Engineering. He also holds the position of Architect at the Altera Toronto Technology Center, a world-leading research and development site for CADsoftware and FPGA architectures, where he is involved in research activities and is the Director of the Altera University Program.

Zvonko Vranesic received his B.A.Sc., M.A.Sc., and Ph.D. degrees, all in Electrical Engineering, from the University of Toronto. From 1963–1965 he worked as a design engineer with the Northern Electric Co. Ltd. in Bramalea, Ontario. In 1968 he joined the University of Toronto, where he is now a Professor Emeritus in the Department of Electrical & Computer Engineering. During the 1978–79 academic year, he was a Senior Visitor at the University of Cambridge, England, and during 1984–85 he was at the University of Paris, 6. From 1995 to 2000 he served as Chair of the Division of Engineering Science at the University of Toronto. He is also involved in research and development at the Altera Toronto Technology Center.

Table of Contents:
UNIT I

INTRODUCTION TO VERILOG : Verilog as HDL, Levels of Design Description, Concurrency, Simulation and

Synthesis, Functional Verification, System Tasks, Programming Language Interface (PLI), Module, Simulation

and Synthesis Tools, Test Benches.

LANGUAGE CONSTRUCTS AND CONVENTIONS : Introduction, Keywords, Identifiers, White Space

Characters, Comments, Numbers, Strings, Logic Values, Strengths, Data Types, Scalars and Vectors,

Parameters, Memory, Operators, System Tasks, Exercises.

UNIT II

GATE LEVEL MODELING : Introduction, AND Gate Primitive, Module Structure, Other Gate Primitives,

Illustrative Examples, Tri-State Gates, Array of Instances of Primitives, Additional Examples, Design of Flipflops

with Gate Primitives, Delays, Strengths and Contention Resolution, Net Types, Design of Basic Circuits,

Exercises.

UNIT III

BEHAVIORAL MODELING : Introduction, Operations and Assignments, Functional Bifurcation, Initial

Construct, Always Construct, Examples, Assignments with Delays, Wait construct, Multiple Always Blocks,

Designs at Behavioral Level, Blocking and Non blocking Assignments, The case statement, Simulation Flow.

iƒ and iƒ-else constructs, assign-deassign construct, repeat construct, for loop, the disable construct, while

loop, forever loop, parallel blocks, force-release construct, Event.

UNIT IV

MODELING AT DATA FLOW LEVEL : Introduction, Continuous Assignment Structures, Delays and

Continuous Assignments, Assignment to Vectors, Operators.

SWITCH LEVEL MODELING.

Introduction, Basic Transistor Switches, CMOS Switch, Bi-directional Gates, Time Delays with Switch

Primitives, Instantiations with Strengths and Delays, Strength Contention with Trireg Nets, Exercises.

UNIT V

SYSTEM TASKS, FUNCTIONS, AND COMPILER DIRECTIVES : Introduction, Parameters, Path Delays,

Module Parameters, System Tasks and Functions, File-Based Tasks and Functions, Compiler Directives,

Hierarchical Access, General Observations, Exercises,

FUNCTIONS, TASKS, AND USER-DEFINED PRIMITIVES : Introduction, Function, Tasks, User- Defined

Primitives (UDP), FSM Design (Moore and Mealy Machines)

UNIT VI

DIGITAL DESIGN WITH SM CHARTS : State Machine Charts, Derivation of SM Charts, Realization of SM

Charts, Implementation of the Dice Game, Alternative realizations for SM Charts using Microprogramming,

Linked State Machines.

UNIT VII

DESIGNING WITH PROGRAMMABLE GATE ARRAYS AND COMPLEX PROGRAMMABLE

LOGIC DEVICES : Xilinx 3000 Series FPGAs, Designing with FPGAs, Using a One-Hot State Assignment,

Altera Complex Programmable Logic Devices (CPLDs), Altera FLEX 10K Series CPLDs.

UNIT VIII

VERILOG MODELS : Static RAM Memory, A simplified 486 Bus Model, Interfacing Memory to a

Microprocessor Bus, UART Design, Design of Microcontroller CPU.

Chapter 1 Design Concepts 1

Chapter 2 Introduction to Logic Circuits 21

Chapter 3 Implementation Technology 77

Chapter 4 Optimized Implementation of Logic Functions 167

Chapter 5 Number Representation and Arithmetic Circuits 249

Chapter 6 Combinational-Circuit Building Blocks 317

Chapter 7 Flip-Flops, Registers, Counters, and a Simple Processor 381

Chapter 8 Synchronous Sequential Circuits 485

Chapter 9 Asynchronous Sequential Circuits 583

Chapter 10 Digital System Design 669

Chapter 11 Testing of Logic Circuits 731

Chapter 12 Computer Aided Design Tools 763

Appendix A VHDL Reference 779

Appendix B Tutorial 1—Introduction to Quartus II CAD Software 833

Appendix C Tutorial 2—Implementing Circuits in Altera Devices 863

Appendix D Tutorial 3—Using Quartus II Tools 879

Appendix E Commercial Devices 899

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